i "think", that as the 020 only have instructions cache, and the cache that is normally disabled for chipmem access is Data Cache. That the 020 does allow for ICache of chipmem stored instructions.
refs:
ACAtune Wiki"On most Amiga accelerator boards, accesses to Chip-Ram either disable the CPU caches completely, or only allow instructions, but not data to be cached."
But i'm not 100% sure im "Thinking" correct.